About Us

EdgeCortix and Renesas Partner to Develop Feature-Rich Compilers For the DRP-AI AI Accelerator

Artificial Intelligence (AI) , Machine Learning (ML), Natural Language Processing (NLP), Deep Learning (DL), AI Model, AI-powered Solutions, Digital Transformation, ML Model, Natural Language Understanding (NLU), AI News, Artificial Intelligence News
A VPN is an essential component of IT security, whether you’re just starting a business or are already up and running. Most business interactions and transactions happen online and VPN

EdgeCortix Inc., a semiconductor design company that harnesses fabless technology, announced a special collaboration with Renesas Electronics Corporation. In collaboration with Renesas, EdgeCortix developed a new compiler for DRP-AI1, using its industry-leading heterogeneous platform-based compiler framework MERA. The compiler is compatible with Renesas’ DRP-AI tools and comes with associated software and tools.

Sakyasingha Dasgupta, Founder, and CEO of EdgeCortix said, “We are eager to apply the power of our MERA compiler across many heterogeneous environments, including leading FPGA boards, EdgeCortix’s own custom AI-Inference ASIC and today, integration with Renesas’ DRP-AI. We are very pleased that Renesas has realized the value, utility, and performance that our MERA solution offers in developing the compiler for DRP-AI. By applying EdgeCortix’s MERA compiler technology to DRP-AI TVM, this combination will create significant business opportunities and value for both Renesas and their end customers in four key functional areas. Namely, Expanded Model Support, ML Framework Expansion, Support for Floating-point 16, and overall Performance Enhancements.”

Key Business Outcomes Delivered by EdgeCortix Through MERA Collaboration with Renesas DRP-AI Tool:

Expanded Model Support: More advanced AI model support with 20+ models investigated, greatly increased flexibility, and improved end-user usability.

ML Framework expansion: Making the ONNX support more robust and adding PyTorch support to the DRP-AI product utility. Future work will include TensorFlow support.

Performance Improvements: This version includes improved performance, especially for models with operators shared between the host CPU and the DRP-AI (a new feature added due to the integration work).

Shigeki Kato, Vice President, Enterprise Infrastructure Business Division at Renesas, said, “We recognized immediately the value of adding the MERA compiler and associated toolset to the RZ/V MPU series, as we expect many of our customers to implement application software including AI technology. As we drive innovation to meet our customer’s needs, we are collaborating with EdgeCortix to rapidly provide our customers with robust, high-performance, and flexible AI-inference solutions. The EdgeCortix team has been terrific, and we are excited by the future opportunities and possibilities for this ongoing relationship.”

Recent News